The present invention relates to integrated circuit (IC) packaging, and more particularly to the case outline and corresponding mold cavity for a semiconductor device.
In order to assemble a typical packaged integrated circuit (IC) device, an IC die is adhesively mounted on and electrically connected to a lead frame. The lead frame is a patterned sheet metal cutout that includes (1) a die pad, also called a flag, for mounting the IC die, and (2) lead fingers, or leads, for providing electrical connections between device-internal components on the die and device-external components. Device-external components might include power sources and input/output connections on a printed circuit board (PCB) on which the IC device is mounted. Wire bonding is performed after the die is mounted on the lead frame. In wire bonding, metal bond wires are bonded to bond pads on the die and corresponding leads on the lead frame.
Following wire bonding, the assembly, including the die, lead frame, and bond wires, is encapsulated with a molding compound, leaving the distal ends of the leads exposed, and then the molding compound is cured. After encapsulation, usually as part of singulation, the process of separating a plurality of attached IC devices into single chips, the IC device is trimmed and formed to make the packaged IC device that is ready for mounting on a circuit board. The trimming includes cutting and/or removing lead frame support structures that were used to hold the leads in place. The forming typically includes bending the leads into shapes, such as so-called gull wings, to allow for attachments to PCBs.
The above-described encapsulation step includes putting the assembly inside a mold form having a cavity, injecting uncured molding compound into the cavity, curing the molding compound, and then removing the mold form. The cured encapsulant, or molding compound, portion of the IC device is referred to herein as the package body or case. The case outline refers to the outline of the case in a plan view. The conventional case outline is a plain rectangle.
Some IC devices have a relatively small size and a relatively high number of leads, which leads to a relatively narrow lead pitch, or distance between adjacent leads (lead pitch is measured as the distance between the center lines of two adjacent leads). The width of the space between two adjacent leads, referred to herein as the lead gap, is equivalent to the lead pitch minus the width of a lead. Generally, the narrower the lead pitch the greater the risk that an electrical short between adjacent leads might occur since the lead-gap width is narrower if the lead width stays the same. Note that sometimes the actual lead-gap width may be narrower than the nominal lead-gap width because of a post-encapsulation plating step in which the exposed portions of the leads are plated with a material to prevent oxidation. Electrical shorts may occur, for example, during the trimming and forming stage, if stray bits of metal get trapped between two adjacent leads.